The invention is related to the transfer of information including a source or destination address between two nodes in a network via data switching logic.
There are many methods of transferring information between nodes coupled together in a single network. Typically, a command is transmitted from one component of a computer system, such as a processor, and the command indicates whether data will be read from or written to another component of the computer system, such as a system resource. The information sent by the component generating the command also specifies the address of either the source of read data or the destination of write data.
In some computer systems, the command and address information is broadcast to every component of the computer system. In these systems, switching logic is not required because the components themselves decode to addresses and decide whether to respond.
In other computer systems, a processor and a system resource may not be able to communicate with each other unless some switching logic is configured properly. For example, the computer system may include multiple processors and system resources, and it may be necessary to set the switching logic to connect a particular processor to a selected system resource bus that is coupled to the desired system resource.
In this second type of system, the switching logic must not only forward the commands and addresses to the system resources the switching logic must also decode the commands and address is in order to adopt the proper configuration.
Typically, the switching logic in these systems performs a store-and-forward function. When the switching logic receives an address from a processor, it stores the address and decodes it so the logic can be properly configured to allow the system resource to communicate with the processor. Once the switching logic is properly configured, the stored commands, addresses and data are forwarded from the switching logic to the selected system resource.
Unfortunately, a system in which switching logic must perform such a store-and-forward function contains added hardware and increases the pipeline delay for all data transfers. Extra storage logic is required to retain the received information while the switching logic is being configured. Furthermore, all information transmitted through the switching logic is held up for the delay period. This delay may be unnecessary, however, if the switching logic is set up at the beginning of a transaction and additional information is being sent between the same processor and system resource.
Therefore, there is a need for a process in which information including an address can be transferred between a particular processor and a selected system resource via switching logic, but in which the amount of hardware is reduced and wherein information transfers are not delayed once the switching logic is properly configured at the beginning of a transaction.